2.3. Register summary

Table 2.2 shows the Cortex-A7 NEON MPE system registers. All NEON MPE system registers are 32-bit wide. Reserved register addresses are unpredictable.

Table 2.2. Cortex-A7 NEON MPE system registers

NameTypeReset Description
FPSIDRO 0x41023074Floating-Point System ID Register
FPSCR RW0x00000000Floating-Point Status and Control Register
MVFR0 RO 0x10110222Media and VFP Feature Register 0
MVFR1RO 0x11111111Media and VFP Feature Register 1
FPEXC RW 0x00000000Floating-Point Exception Register

Note

The FPINST and FPINST2 registers are not implemented, and any attempt to access them is unpredictable.

Table 2.3 shows the processor modes for accessing the Cortex-A7 NEON MPE system registers.

Table 2.3. Accessing Cortex-A7 NEON MPE system registers

Register Privileged access User access
FPEXC EN=0FPEXC EN=1 FPEXC EN=0 FPEXC EN=1
FPSID Permitted Permitted Not permitted Not permitted
FPSCRNot permittedPermittedNot permittedPermitted
MVFR0, MVFR1 Permitted Permitted Not permittedNot permitted
FPEXCPermittedPermitted Not permitted Not permitted

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