2.1.1. VFP feature identification registers

The Cortex-A7 FPU implements the ARMv7 VFPv4 extension.

Software can identify this extension and the features it provides, using the feature identification registers. These registers are in extension is in the coprocessor space for coprocessors CP10 and CP11. You can access the registers using the VMRS and VMSR instructions, for example:

VMRS <Rd>, FPSID ; Read Floating-Point System ID Register
VMRS <Rd>, MVFR1 ; Read Media and VFP Feature Register 1
VMSR FPSCR, <Rt> ; Write Floating-Point System Control Register

See VFP register access for a description of the registers.

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