2.3. Register summary

Table 2.2 shows the Cortex-A7 FPU system registers. All Cortex-A7 FPU system registers are 32-bit wide. Reserved register addresses are unpredictable.

Table 2.2. Cortex-A7 FPU system registers


The FPINST and FPINST2 registers are not implemented, and any attempt to access them is unpredictable.

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