4.3.42. Instruction Fault Status Register

The IFSR characteristics are:

Purpose

Holds status information about the last instruction fault.

Usage constraints

The IFSR is:

  • a read/write register

  • Banked for Secure and Non-secure states

  • accessible from PL1 or higher.

Configurations

Available in all configurations.

Attributes

See the register summary in Table 4.6.

There are two formats for this register. The current translation table format determines which format of the register is used. This section describes:

IFSR when using the Short-descriptor translation table format

Figure 4.36 shows the IFSR bit assignments when using the Short-descriptor translation table format.

Figure 4.36. IFSR bit assignments for Short-descriptor translation table format

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Table 4.70 shows the IFSR bit assignments when using the Short-descriptor translation table format.

Table 4.70. IFSR bit assignments for Long-descriptor translation table format

BitsNameFunction
[31:13]-

Reserved, UNK/SBZP.

[12]ExT

External abort type. This field indicates whether an AXI Decode or Slave error caused an abort:

0

External abort marked as DECERR.

1

External abort marked as SLVERR.

For aborts other than external aborts this bit always returns 0.

[11]-

Reserved, UNK/SBZP.

[10]FS[4]Part of the Fault Status field. See bits [3:0] in this table.
[9]-

RAZ.

[8:4]-

Reserved, UNK/SBZP.

[3:0]FS[3:0]

Fault Status bits. This field indicates the type of exception generated. Any encoding not listed is reserved.

0b00010

Debug event

0b00011

Access flag fault, section.

0b00101

Translation fault, section.

0b00110

Access flag fault, page.

0b00111

Translation fault, page.

0b01000

Synchronous external abort, non-translation.

0b01001

Domain fault, section.

0b01011

Domain fault, page.

0b01100

Synchronous external abort on translation table walk, 1st level.

0b01101

Permission Fault, Section.

0b01110

Synchronous external abort on translation table walk, 2nd Level.

0b01111

Permission fault, page.


IFSR when using the Long-descriptor translation table format

Figure 4.37 shows the IFSR bit assignments when using the Long-descriptor translation table format.

Figure 4.37. IFSR bit assignments for Long-descriptor translation table format

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Table 4.71 shows the IFSR bit assignments when using the Long-descriptor translation table format.

Table 4.71. IFSR bit assignments for Long-descriptor translation table format

BitsNameFunction
[31:13]-

Reserved, UNK/SBZP.

[12]ExT

External abort type. This field indicates whether an AXI Decode or Slave error caused an abort:

0

External abort marked as DECERR

1

External abort marked as SLVERR.

For aborts other than external aborts this bit always returns 0.

[11:10]-

Reserved, UNK/SBZP.

[9]-

RAO.

[8:6]-

Reserved, UNK/SBZP.

[5:0]Status

Fault Status bits. This field indicates the type of exception generated. Any encoding not listed is reserved.

0b0001LL

Translation fault, LL bits indicate level.

0b0010LL

Access fault flag, LL bits indicate level.

0b0011LL

Permission fault, LL bits indicate level.

0b010000

Synchronous external abort.

0b100010

Debug event.


Table 4.72 shows how the LL bits in the Status field encode the lookup level associated with the MMU fault.

Table 4.72. Encodings of LL bits associated with the MMU fault

BitsMeaning
0b00Reserved
0b01Level 1
0b10Level 2
0b11Level 3

Note

If a Data Abort exception is generated by an instruction cache maintenance operation when the Long-descriptor translation table format is selected, the fault is reported as a Cache Maintenance fault in the DFSR or HSR with the appropriate Fault Status code. For such exceptions reported in the DFSR, the corresponding IFSR is Unknown.

To access the IFSR, read or write the CP15 register with:

MRC p15, 0, <Rt>, c5, c0, 1; Read Instruction Fault Status Register
MCR p15, 0, <Rt>, c5, c0, 1; Write Instruction Fault Status Register
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