4.2.1. c0 registers

Table 4.2 shows the 32-bit wide system control registers you can access when CRn is c0.

Table 4.2. c0 register summary

CRnOp1CRmOp2NameResetDescription
c00c00MIDR0x410FC073

Main ID Register

   1CTR0x84448003

Cache Type Register

   2TCMTR0x00000000

TCM Type Register

   3TLBTR0x00000000

TLB Type Register

   5MPIDR-[a]

Multiprocessor Affinity Register

   6REVIDR0x00000000Revision ID Register
   4, 7MIDR0x410FC073

Aliases of Main ID Register, Main ID Register

  c10ID_PFR00x00001131

Processor Feature Register 0

   1ID_PFR10x00011011

Processor Feature Register 1

   2ID_DFR00x02010555

Debug Feature Register 0

   3ID_AFR00x00000000Auxiliary Feature Register 0
   4ID_MMFR00x10101105

Memory Model Feature Register 0

   5ID_MMFR10x40000000

Memory Model Feature Register 1

   6ID_MMFR20x01240000

Memory Model Feature Register 2

   7ID_MMFR30x02102211

Memory Model Feature Register 3

  c20ID_ISAR00x01101110

Instruction Set Attribute Register 0

   1ID_ISAR10x13112111

Instruction Set Attribute Register 1

   2ID_ISAR20x21232041

Instruction Set Attribute Register 2

   3ID_ISAR30x11112131

Instruction Set Attribute Register 3

c00c24ID_ISAR40x10011142

Instruction Set Attribute Register 4

   5ID_ISAR50x00000000

Instruction Set Attribute Register 5

 1c00CCSIDRUNK

Cache Size ID Register

   1CLIDR-[b]

Cache Level ID Register

   7AIDR0x00000000

Auxiliary ID Register

 2c00CSSELRUNKCache Size Selection Register
 4c00VPIDR-[c]

Virtualization Processor ID Register

   5VMPIDR-[d]Virtualization Multiprocessor ID Register

[a] The reset value depends on the primary input CLUSTER ID and the CPU ID value in the Multiprocessor Affinity Register.

[b] The reset value depends on whether L2 cache is implemented.

[c] The reset value is the value of the Main ID Register.

[d] The reset value is the value of the Multiprocessor Affinity Register.


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