3.3.2. Register description

This section describes the Cortex-A7 Jazelle Extension registers. Table 3.1 provides cross references to individual register bits.

Jazelle Identity Register

The JIDR characteristics are:

Purpose

Enables software to determine the implementation of the Jazelle Extension provided by the processor.

Usage constraints

The JIDR is:

  • a read-only register

  • accessible from all privilege levels.

Configurations

Available in all configurations.

Attributes

See the register summary in Table 3.1.

Figure 3.1 shows the JIDR bit assignments.

Figure 3.1. JIDR Register bit assignments

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Table 3.2 shows the JIDR bit assignments.

Table 3.2. JIDR Register bit assignments

BitsNameFunction
[31:0]-

Reserved, RAZ


To access the JIDR, read the CP14 register with:

MRC p14, 7, <Rd>, c0, c0, 0; Read Jazelle Identity Register

Jazelle OS Control Register

The JOSCR characteristics are:

Purpose

Provides operating system control of the use of the Jazelle Extension.

Usage constraints

The JOSCR is:

  • a read/write register

  • accessible only from PL1 or higher.

Configurations

Available in all configurations.

Attributes

See the register summary in Table 3.1.

Table 3.3 shows the JOSCR bit assignments.

Table 3.3. JOSCR Register bit assignments

BitsNameFunction
[31:0]-

Reserved, RAZ/WI


To access the JOSCR, read or write the CP14 register with:

MRC p14, 7, <Rd>, c1, c0, 0; Read Jazelle OS Control Register
MCR p14, 7, <Rd>, c1, c0, 0; Write Jazelle OS Control Register

Jazelle Main Configuration Register

The JMCR characteristics are:

Purpose

Provides control of the Jazelle Extension features.

Usage constraints

The JMCR is:

  • a read/write register, with access rights that depend on the current privilege level:

    • write-only in unprivileged level

    • read-write at PL1 or higher.

Configurations

Available in all configurations.

Attributes

See the register summary in Table 3.1.

Table 3.4 shows the JMCR bit assignments.

Table 3.4. JMCR Register bit assignments

BitsNameFunction
[31:0]-

Reserved, RAZ/WI


To access the JMCR, read or write the CP14 register with:

MRC p14, 7, <Rd>, c2, c0, 0; Read Jazelle Main Configuration Register
MCR p14, 7, <Rd>, c2, c0, 0; Write Jazelle Main Configuration Register
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