8.2.4. GIC configuration

Table 8.2 lists the configurable options for the GIC.

Table 8.2. GIC configurable options

FeatureRange of options
GICPresent or not present
SPIs0 to 480, in steps of 32

It is implementation-defined to whether the GIC is present or not present.

If you configure the design to exclude the GIC:

The Cortex-A7 MPCore processor always includes the virtual interrupt signals, nVIRQ and nVFIQ, regardless of whether the GIC is present or not. There is one nVIRQ and one nVFIQ for each processor. If you configure the processor to exclude the GIC, the input pins nVIRQ and nVFIQ can be tied off to HIGH if unused, or can be driven by an external GIC in the SoC.

If you configure the processor to include the GIC, and the GIC is used, the input pins nVIRQ and nVFIQ must be tied off to HIGH. This is because the internal GIC generates the virtual interrupt signals to the processors. If you configure the processor to include the GIC, and the GIC is not used, the input pins nVIRQ and nVFIQ can be driven by an external GIC in the SoC.

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