4.2.1. c0 registers

Table 4.2 shows the 32-bit wide system control registers you can access when CRn is c0.

Table 4.2. c0 register summary


Main ID Register


Cache Type Register


TCM Type Register


TLB Type Register


Multiprocessor Affinity Register

   6REVIDR0x00000000Revision ID Register
   4, 7MIDR0x410FC075

Aliases of Main ID Register, Main ID Register


Processor Feature Register 0


Processor Feature Register 1


Debug Feature Register 0

   3ID_AFR00x00000000Auxiliary Feature Register 0

Memory Model Feature Register 0


Memory Model Feature Register 1


Memory Model Feature Register 2


Memory Model Feature Register 3


Instruction Set Attribute Register 0


Instruction Set Attribute Register 1


Instruction Set Attribute Register 2


Instruction Set Attribute Register 3


Instruction Set Attribute Register 4


Instruction Set Attribute Register 5


Cache Size ID Register


Cache Level ID Register


Auxiliary ID Register

 2c00CSSELRUNKCache Size Selection Register

Virtualization Processor ID Register

   5VMPIDR-[d]Virtualization Multiprocessor ID Register

[a] The reset value depends on the primary input CLUSTER ID and the CPU ID value in the Multiprocessor Affinity Register.

[b] The reset value depends on whether L2 cache is implemented.

[c] The reset value is the value of the Main ID Register.

[d] The reset value is the value of the Multiprocessor Affinity Register.

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