4.2.13. c12 registers

Table 4.12 shows the 32-bit wide system control registers you can access when CRn is c10.

Table 4.12. c10 register summary

CRnOp1CRmOp2NameResetDescription
c120c00VBAR

0x00000000[a]

Vector Base Address Register, see the ARM Architecture Reference Manual

1MVBARUNK

Monitor Vector Base Address Register, see the ARM Architecture Reference Manual

c10ISRUNK

Interrupt Status Register, see the ARM Architecture Reference Manual

4c00HVBARUNK

Hyp Vector Base Address Register, see the ARM Architecture Reference Manual

[a] The reset value is 0x00000000 for the Secure copy of the register. You must program the Non-secure copy of the register with the required initial value, as part of the processor boot sequence.


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