10.6. External debug interface

The system can access memory-mapped debug registers through the APB interface. The APB interface is compliant with the APB interface.

Figure 10.25 shows the debug interface implemented in the Cortex-A7 MPCore processor. For more information on these signals, see the ARM Architecture Reference Manual.

Figure 10.25. External debug interface, including APBv3 slave port

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.

Copyright © 2011-2013 ARM. All rights reserved.ARM DDI 0464F