6.3.2. Program flow prediction

The following sections describe program flow prediction:

Predicted and non-predicted instructions

This section shows the instructions that the processor predicts. Unless otherwise specified, the list applies to ARM and Thumb instructions. As a general rule, the flow prediction hardware predicts all branch instructions regardless of the addressing mode, including:

  • Conditional branches.

  • Unconditional branches.

  • Indirect branches associated with function-call and return instructions.

  • Branches that switch between ARM and Thumb states.

However, some branch instructions are not predicted:

  • PC destination data processing operations.

  • Instructions with the S suffix are not predicted because they are typically used to return from exceptions and have side-effects that can change privilege mode and security state.

  • All mode changing instructions.

Thumb state conditional branches

In Thumb state, a branch that is normally encoded as unconditional can be made conditional by inclusion in an If-Then (IT) block. Then it is treated as a normal conditional branch.

Return stack predictions

The return stack stores the address and the ARM or Thumb state of the instruction after a function-call type branch instruction. This address is equal to the link register value stored in r14. The following instructions cause a return stack push if predicted:

  • BL immediate .

  • BLX immediate.

  • BLX register.

The following instructions cause a return stack pop if predicted:

  • BX r14.

  • POP {…,pc}.

  • LDR pc, [r13].

The LDR instruction can use any of the addressing modes, as long as r13 is the base register.

Because return-from-exception instructions can change processor privilege mode and security state, they are not predicted. This includes the LDM R<n>, {.. ,pc}^ instruction, RFE, and the MOVS pc, r14 instruction.

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