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Home > Functional Description > DMC-400 operation > Configurability |
This section describes the configuration parameters that you can set for the DMC-400.
If the DMC-400 cannot map an ACE-Lite burst to a single DMC-400 burst, it splits the ACE-Lite burst into multiple DMC-400 bursts that in turn consume multiple slots. Therefore the terms burst and hazards refer to DMC-400 bursts and DMC-400 hazards, and not ACE-Lite bursts and ACE-Lite hazards.
Table 2.3 shows the system configuration parameters that you can set.
Table 2.3. System configuration parameters
Description | Range of values | Default value |
---|---|---|
The bit-width of the system ID bus | 4-24 | 8 |
The bit-width of the system interface address bus | 32, 40, 64 | 32 |
The bit-width of the system interface data bus | 64, 128, 256 | 64 |
The number of read bursts that each system interface can accept | 16, 32, 64 | 32 |
The number of read ID hazards that each system interface can issue before stalling more requests | 8, 16 | 8 |
How you implement the read hazard buffer | RAM, synthesized registers | synthesized registers |
Whether to include logic to support Virtual Networks | False, True | False |
Table 2.4 shows the memory configuration parameters that you can set.
Table 2.4. Memory configuration parameters
Description | Range of values | Default value |
---|---|---|
The bit-width of the DFI data bus | 32, 64, 128 | 64 |
The number of chip-selects on each memory interface | 1, 2 | 1 |
The number of memory bursts the write buffer can hold | 16, 32, 64 | 32 |
How you implement the write buffer | RAM, synthesized registers | synthesized registers |
The number of memory bursts the read queue can hold | 16, 32, 64 | 32 |
The number of DFI data beats in each queued burst | 4, 8 | 8 |
Whether to include logic to support Single Error Correct, Double Error Detect ECC protection on the external memory. ECC is only supported for DFI widths of 128 bits or 64 bits | False, True | False |