CoreLink DMC-400 Dynamic Memory Controller Technical Reference ManualRevision: r1p2
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A.7.3. Wakeup signals

Table A.10. Wakeup signals

Signal

Type

Description

cwakeup_sInputWakeup signal for the clock domain of the system interface and interconnect
cwakeup_mInputWakeup signal for the clock domain of the interconnect, read buffer, write buffer, and memory interface

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