3.5.5. Configuration Code Extension Register

The ETMCCER characteristics are:

Purpose

Indicates the configuration of the extended external input bus.

Usage constraints

Read by software only.

Configurations

Available in all configurations.

Attributes

See the register summary in Table 3.1 and Table 3.2.

Figure 3.5 shows the ETMCCER bit assignments.

Figure 3.5. ETMCCER bit assignments

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Table 3.12 shows the ETMCCER bit assignments.

Table 3.12. ETMCCER bit assignments

BitsNameDescription
[31:30]-Reserved, RAZ.
[29]Timestamp size

Indicates support for timestamp size:

1

Supports a 64-bit timestamp size.

[28]Timestamp encoding.

Indicates the type of timestamp encoding support:

1

Supports binary encoded timestamp.

[27]Counter function

Indicates support for full or reduced counter function:

0

Supports full counter function.

[26] Virtualization Extensions

Indicates support for Virtualization Extensions:

1

Supports Virtualization Extensions.

[25:23]-Reserved, RAZ.
[22]Timestamping

Indicates support for timestamping support:

1

Supports timestamping and:

  • the Timestamp Event Register is implemented

  • bit[28] in the Main Control Register is writable.

[21]

ETMEIBCR implemented

Indicates support for ETMEIBCR:

1

No ETMEIBCR supported.

[20]

Trace start and stop block usage

Indicates if the start and stop block supports EmbeddedICE watchpoint inputs.

0

No EmbeddedICE watchpoint inputs supported.

[19:16]

EmbeddedICE watchpoint inputs

Indicates the number of EmbeddedICE watchpoint inputs supported:

0b0000

No EmbeddedICE watchpoint inputs supported.

[15:13]

Instrumentation resources supported.

Indicates the number of instrumentation resources supported:

0b000

No instrumentation resources supported.

[12]Data address comparisons

Indicates support for data address comparisons:

0

No data address comparisons are supported.

[11]All registers are readable.

All registers, except some integration test registers, are readable.

See Table 3.7 for information about accesses to integration test registers [a].

[10:3]Size of extended external input bus

Indicates the number of PMUEVENT registers available.

[2:0]Number of extended external input selectors

Indicates the number of extended external input selectors available.

[a] Registers with names that start with IT are the Integration Test Registers, for example ITATBCTR1.


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