3.3.13. Max OT Registers

The Max OT Registers characteristics are:

Purpose

Determine how many outstanding transactions are permitted when the OT regulator is enabled for each ACE-Lite slave interface. One register exists for each of the S0, S1, and S2 slave interfaces. A value of 0 for both the integer and fractional parts disables the programmable regulation so that the hardware limits apply. A value of 0 for the fractional part disables the regulation of fractional outstanding transactions. If int is the value of the integer part and frac is the value of the fractional part, then:Maximum number of outstanding transactions = int + frac/256.

Usage constraints

Setting the maximum outstanding transaction size greater than that configured in the RTL, using the R_MAX or W_MAX parameters, has no effect. See the CoreLink CCI-400 Cache Coherent Interconnect Integration Manual for information on the design-time configuration of the CCI-400. Accessible using only secure accesses, unless you set the Secure Access Register. See Table 3.4.

Configurations

Available in all CCI-400 configurations.

Attributes

Table 3.15 shows the bit assignments.

Table 3.15. Max OT Register

BitsReset valueAccessFunction
[31:30]-RAZ/WIReserved
[29:24]0x0R/WInteger part of the maximum outstanding AR addresses
[23:16]0x0R/WFractional part of the maximum outstanding AR addresses
[15:14]-RAZ/WIReserved
[13:8]0x0R/WInteger part of the maximum outstanding AW addresses
[7:0]0x0R/WFractional part of the maximum outstanding AW addresses

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