1.7.1. Documentation

The CCI-400 Cache Coherent Interconnect documentation is as follows:

Technical Reference Manual

The Technical Reference Manual (TRM) describes the functionality and the effects of functional options on the behavior of the CCI-400 Cache Coherent Interconnect. It is required at all stages of the design flow. The choices made in the design flow can mean that some behavior described in the TRM is not relevant. If you are programming the CCI-400 Cache Coherent Interconnect then contact:

  • the implementer to determine:

    • the build configuration of the implementation

    • what integration, if any, was performed before implementing the CCI-400 Cache Coherent Interconnect

  • the integrator to determine the pin configuration of the device that you are using.

Implementation Guide

The Implementation Guide (IG) describes:

  • the available build configuration options and related issues in selecting them

  • how to configure the Register Transfer Level (RTL) code with the build configuration options

  • the processes to sign off the configured design.

The ARM product deliverables include reference scripts and information about using them to implement your design.

The IG is a confidential book that is only available to licensees.

Integration Manual

The Integration Manual (IM) describes how to integrate the CCI-400 Cache Coherent Interconnect into a SoC. It includes describing the pins that the integrator must tie off to configure the macrocell for the required integration. Some of the integration is affected by the configuration options used when implementing the CCI-400 Cache Coherent Interconnect.

The IM is a confidential book that is only available to licensees.

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