A.1.5. Slave interface signals

A set of slave interface signals exists for each slave interface. The suffix is Sx, where x is 0-4.

This section describes:

Write address channel signals

Table A.5 shows the write address channel signals.

Table A.5. Write address channel signals

SignalDirectionDescription
AWIDSx[n:0]InputWrite address ID. You can configure the width of this signal.
AWADDRSx[39:0]InputWrite address.
AWREGIONSx[3:0]InputWrite address region. You can tie this signal LOW if the master does not drive it.
AWLENSx[7:0]InputWrite burst length.
AWSIZESx[2:0]InputWrite burst size.
AWBURSTSx[1:0]InputWrite burst type
AWLOCKSxInputWrite lock type.
AWCACHESx[3:0]InputWrite cache type.
AWPROTSx[2:0]InputWrite protection type.
AWSNOOPSx[2:0]InputWrite snoop request type.
AWDOMAINSx[1:0]InputWrite domain.
AWBARSx[1:0]InputWrite barrier type.
AWQOSSx[3:0]InputWrite Quality-of-Service (QoS) value.
AWUSERSx[n:0]InputUser-specified extension to AW payload.
AWVALIDSxInputWrite address valid.
AWREADYSxOutputWrite address ready.

Write data channel signals

Table A.6 shows the write data channel signals.

Table A.6. Write data channel signals

SignalDirectionDescription
WDATASx[127:0]InputWrite data
WSTRBSx[15:0]InputWrite byte-lane strobes
WLASTSxInputWrite data last transfer indication
WUSERSx[n:0]InputUser-specified extension to W payload
WVALIDSxInputWrite data valid
WREADYSxOutputWrite data ready

Write data response channel signals

Table A.7 shows the write data response channel signals.

Table A.7. Write data response channel signals

SignalDirectionDescription
BIDSx[n:0]OutputWrite response ID. You can configure the width.
BRESPSx[1:0]OutputWrite response.
BUSERSx[n:0]OutputUser-specified extension to B payload.
BVALIDSxOutputWrite response valid.
BREADYSxInputWrite response ready.

Read address channel signals

Table A.8 shows the read address channel signals.

Table A.8. Read address channel signals

SignalDirectionDescription
ARIDSx[n:0]InputRead address ID. You can configure the width of this signal.
ARADDRSx[39:0]InputRead address.
ARREGIONSx[3:0]InputRead address region. You can tie this signal LOW if the master does not drive it.
ARLENSx[7:0]InputRead burst length.
ARSIZESx[2:0]InputRead burst size.
ARBURSTSx[1:0]InputRead burst type.
ARLOCKSxInputRead lock type.
ARCACHESx[3:0]InputRead cache type.
ARPROTSx[2:0]InputRead protection type.
ARDOMAINSx[1:0]InputRead domain.
ARSNOOPSx[3:0]InputRead snoop request type.
ARBARSx[1:0]InputRead barriers.
ARQOSSx[3:0]InputRead QoS.
ARUSERSx[n:0]InputUser-specified extension to AR payload.
ARVALIDSxInputRead address valid.
ARREADYSxOutputRead address ready.

Read data channel signals

Table A.9 shows the read data channel signals.

Table A.9. Read data channel signals

SignalDirectionDescription
RIDSx[n:0]OutputRead data ID. You can configure the width of this signal.
RDATASx[127:0]OutputRead data.
RRESPSx[3:0]OutputRead data response for ACE interfaces, that is, S3 and S4.
RRESPSx[1:0]OutputRead data response for ACE-Lite interfaces, that is, S0, S1, S2.
RLASTSxOutputRead data last transfer indication.
RUSERSx[n:0]OutputUser-specified extension to R payload.
RVALIDSxOutputRead data valid.
RREADYSxInputRead data ready.

Coherency address channel signals

Table A.10 shows the coherency address channel signals.

Table A.10. Coherency address channel signals

SignalDirectionDescription
ACADDRSx[39:0]OutputSnoop address
ACPROTSx[2:0]OutputSnoop protection type
ACSNOOPSx[3:0]OutputSnoop request type
ACVALIDSxOutputSnoop address valid
ACREADYSxInputMaster ready to accept snoop address

Coherency response channel signals

Table A.11 shows the coherency response channel signals.

Table A.11. Coherency response channel signals

SignalDirectionDescription
CRRESPSx[4:0]InputSnoop response
CRVALIDSxInputSnoop response valid
CRREADYSxOutputSlave ready to accept snoop response

Coherency data channel signals, full ACE interfaces, S3 and S4 only

Table A.12 shows the coherency data channel signals, for full ACE interfaces, S3 and S4 only.

Table A.12. Coherency data channel signals, full ACE interfaces, S3 and S4 only

SignalDirectionDescription
CDDATASx[127:0]InputSnoop data
CDLASTSxInputSnoop data last transfer
CDVALIDSxInputSnoop data valid
CDREADYSxOutputSlave ready to accept snoop data

Acknowledge signals, full ACE interfaces, S3 and S4 only

Table A.13 shows the acknowledge signals, full ACE interfaces, S3 and S4 only.

Table A.13. Acknowledge signals, full ACE interfaces, S3 and S4 only

SignalDirectionDescription
RACKSxInputRead acknowledge
WACKSxInputWrite acknowledge

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