3.3.2. Speculation Control Register

The Speculation Control Register characteristics are:

Purpose

Disables speculative fetches for a master interface.

Usage constraints

Access controlled by Secure Access Register, see Secure Access Register.

Configurations

Available in all CCI-400 configurations.

Attributes

Table 3.3 shows the bit assignments.

Table 3.3. Speculation Control Register

BitsReset valueAccessFunction
[31:3]-RAZ/WIReserved
[2:0]0x0R/W

Disable speculative fetches from a master interface.

One bit for each master interface, M2, M1, M0:

0b0

Enable speculative fetches.

0b1

Disable speculative fetches.


Copyright © 2011-2012 ARM. All rights reserved.ARM DDI 0470D
Non-ConfidentialID040512