3.3.8. Snoop Control Registers

One Snoop Control Register exists for each slave interface. Table 3.10 shows the bit assignments.

Table 3.10. Snoop Control Registers

BitsReset valueAccessFunction
[31]ACCHANNELEN inputR/WI

Slave interface supports DVM messages.

This is overridden to 0x0 if you set the Control Override Register [1]. See Control Override Register.

[30]

ACCHANNELEN input for S3 and S4

0x0 for S0, S1, and S2

R/WI

Slave interface supports snoops.

This is overridden to 0x0 if you set the Control Override Register [0]. See Control Override Register.

[29:2]-RAZ/WIReserved.
[1]0x0R/W

Enable issuing of DVM message requests from this slave interface.

RAZ/WI for interfaces not supporting DVM messages:

0b0

Disable DVM message requests.

0b1

Enable DVM message requests.

[0]0x0R/W

Enable issuing of snoop requests from this slave interface.

RAZ/WI for interfaces not supporting snoops:

0b0

Disable snoop requests.

0b1

Enable snoop requests.


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