3.3.19. Counter Control Registers

The Counter Control Registers characteristics are:

Purpose

Enables or disables the Cycle and Event Counters. One register exists per counter.

Usage constraints

There are no usage constraints.

Configurations

Available in all CCI-400 configurations.

Attributes

Figure 3.17 shows the bit assignments.

Figure 3.17. Counter Control Register bit assignments

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Table 3.21 shows the bit assignments.

Table 3.21. Counter Control Register bit assignments

Bits

Reset

Access

Function

[31:1]

-

RAZ/WI

Reserved.

[0]

0b0

RW

Counter enable:

0b0

Counter disabled.

0b1

Counter enabled.


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