ARM CoreLink CCI-400 Cache Coherent Interconnect Technical Reference ManualRevision: r1p3
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3.3.11. Write Channel QoS Value Override Register

The Write Channel QoS Value Override Register characteristics are:

Purpose

Contains override values for AWQOS, with a register for each slave interface. This value is used if you set the QOSOVERRIDE[4:0] input signal bit for this slave interface and the QoS value regulator is not enabled.

You can also read the current value of the QoS value regulator for write accesses when the regulator is enabled.

Usage constraints

Accessible using only Secure accesses, unless you set the Secure Access Register. See Table 3.4.

Configurations

Available in all CCI-400 configurations.

Attributes

See Table 3.1.

Figure 3.10 shows the bit assignments.

Figure 3.10. Write Channel QoS Value Override Register bit assignments

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Table 3.13 shows the bit assignments.

Table 3.13. Write Channel QoS Value Override Register bit assignments

Bits

Reset

Access

Function

[31:12]

-

RAZ/WI

Reserved.

[11:8]

0x0

R/WI

Reads what value is currently applied to transactions with AWQOS=0, provided QOSOVERRIDE is HIGH and the QoS value regulator is enabled.

[7:4]

-

RAZ/WI

Reserved.

[3:0]

0x0

RW

AWQOS value override for the slave interface.


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