A.1.2. Configuration signals

Configuration signals are sampled only when ARESETn transitions from LOW to HIGH.

Table A.2 shows the configuration signals.

Table A.2. Configuration signals

Signal

Direction

Description

PERIPHBASE[39:15]

Input

Base address for CCI-400 programmable registers.[a]

ADDRMAPx[1:0][b]

Input

Defines the decode of each region of the address map.

One set of inputs exists for each of the 16 regions in the address map.

STRIPING_GRANULE[2:0]Input

Sets the stripe granule size for regions defined as striping between interfaces M1 and M2. Use one of the following encodings:

Value      Granule size

0b000      4KB

0b001      128Byte

0b010      256Byte

0b011      512Byte

0b100      1KB

0b101      2KB

0b110      Reserved

0b111      Reserved

BROADCASTCACHEMAINT[2:0]

Input

If HIGH, then cache maintenance operations are sent downstream. Only set if there is a downstream cache with an ACE-Lite interface.

One bit exists for each master interface.

BARRIERTERMINATE[2:0]

Input

If HIGH, then barriers are terminated in the master interface and not propagated downstream. Set this HIGH if the downstream slave does not support barriers.

One bit exists for each master interface.

BUFFERABLEOVERRIDE[2:0]

Input

If HIGH, then all transactions from a master interface are made non-bufferable by modifying AWCACHE[0] and ARCACHE[0].

One bit exists for each master interface.

QOSOVERRIDE[4:0]

Input

If HIGH, internally generated values override the ARQOS and AWQOS inputs.

One bit exists for each slave interface.

ACCHANNELEN[4:0]

Input

If LOW, then AC requests are never issued on the corresponding slave interface.

One bit exists for each slave interface.

QVNENABLEMz

Input

HIGH to enable the use of virtual networks on a master interface. Keep LOW if the downstream slave does not support QVN.

One bit exists for each master interface.

QVNVNETSy[1:0]

Input

Defines the virtual network number used for transactions from each slave interface.

QVNPREALLOCRMz[3:0]

Input

HIGH to indicate that the virtual network has a pre-allocated read token.

One bit per virtual network. Bit[0] represents virtual network 0, bit[1] represents to virtual network 1, bit[2] represents virtual network 2, and bit[3] represents virtual network 3.

QVNPREALLOCWMz[3:0]

Input

HIGH to indicate that the virtual network has a pre-allocated write token.

One bit per virtual network. Bit[0] represents virtual network 0, bit[1] represents to virtual network 1, bit[2] represents virtual network 2, and bit[3] represents virtual network 3.

[a] The base address for internal CCI-400 registers is defined using a static input, PERIPHBASE[39:15]. The CCI-400 registers are offset by 0x90000 from this base address, and occupy an address region of size 64KB. For example, if PERIPHBASE is 0x0000000, then the register space occupies the region 0x0000090000 to 0x000009FFFF.

[b] Where x is 0-15.


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