A.1.6. Master interface signals

A set of master interface signals exists for each master interface. The suffix is My, where y is 0, 1, or 2.

This section describes:

Write address channel signals

Table A.14 shows the write address channel signals.

Table A.14. Write address channel signals

Signal

Direction

Description

AWIDMy[n:0]

Output

Write address ID. Width is the maximum AWID width across the slave interfaces + 3 bits, at least 5 bits.

AWADDRMy[39:0]

Output

Write address.

AWREGIONMy[3:0]

Output

Write address region.

AWLENMy[7:0]

Output

Write burst length.

AWSIZEMy[2:0]

Output

Write burst size.

AWBURSTMy[1:0]

Output

Write burst type.

AWLOCKMy

Output

Write lock type.

AWCACHEMy[3:0]

Output

Write cache type.

AWPROTMy[2:0]

Output

Write protection type.

AWSNOOPMy[2:0]

Output

Write snoop request type.

AWDOMAINMy[1:0]

Output

Write domain.

AWBARMy[1:0]

Output

Write barrier type.

AWQOSMy[3:0]

Output

Write QoS value.

AWVNETMy[3:0]

Output

Write virtual network number.

AWUSERMy[n:0]

Output

User-specified extension to AW payload.

AWVALIDMy

Output

Write address valid.

AWREADYMy

Input

Write address ready.


Write data channel signals

Table A.15 shows the write data channel signals.

Table A.15. Write data channel signals

Signal

Direction

Description

WIDMy[n:0]

Output

Write ID. Included to help connection to AXI3 slaves.

WDATAMy[127:0]

Output

Write data.

WSTRBMy[15:0]

Output

Write byte-lane strobes.

WLASTMy

Output

Write data last transfer indication.

WVNETMy[3:0]

Output

Output Write data virtual network number.

WUSERMy[n:0]

Output

User-specified extension to W payload.

WVALIDMy

Output

Write data valid.

WREADYMy

Input

Write data ready.


Write data response channel signals

Table A.16 shows the write data response channel signals.

Table A.16. Write data response channel signals

Signal

Direction

Description

BIDMy[n:0]

Input

Write response ID

BRESPMy[1:0]

Input

Write response

BUSERMy[n:0]

Input

User-specified extension to B payload

BVALIDMy

Input

Write response valid

BREADYMy

Output

Write response ready


Read address channel signals

Table A.17 shows the read address channel signals.

Table A.17. Read address channel signals

Signal

Direction

Description

ARIDMy[n:0]

Output

Read address ID. Width is the maximum ARID width across slave interfaces + 3 bits, at least 7 bits.

ARADDRMy[39:0]

Output

Read address.

ARREGIONMy[3:0]

Output

Read address region.

ARLENMy[7:0]

Output

Read burst length.

ARSIZEMy[2:0]

Output

Read burst size.

ARBURSTMy[1:0]

Output

Read burst type.

ARLOCKMy

Output

Read lock type.

ARCACHEMy[3:0]

Output

Read cache type.

ARPROTMy[2:0]

Output

Read protection type.

ARDOMAINMy[1:0]

Output

Read domain.

ARSNOOPMy[3:0]

Output

Read snoop request type.

ARBARMy[1:0]

Output

Read barriers.

ARQOSMy[3:0]

Output

Read QoS value.

ARVNETMy[3:0]

Output

Read virtual network number.

ARUSERMy[n:0]

Output

User-specified extension to AR payload.

ARVALIDMy

Output

Read address valid.

ARREADYMy

Input

Read address ready.


Read data channel signals

Table A.18 shows the read data channel signals.

Table A.18. Read data channel signals

Signal

Direction

Description

RIDMy[n:0]

Input

Read data ID

RDATAMy[127:0]

Input

Read data

RRESPMy[1:0]

Input

Read data response

RLASTMy

Input

Read data last transfer indication

RUSERMy[n:0]

Input

User-specified extension to R payload

RVALIDMy

Input

Read data valid

RREADYMy

Output

Read data ready


AXI low-power interface signals

Table A.19 shows the AXI low-power interface signals.

Table A.19. AXI low-power interface signals

Signal

Direction

Description

CSYSREQ

Input

Exit low-power state request.

  • A HIGH-to-LOW transition indicates a request to enter the low-power state.

  • A LOW-to-HIGH transition indicates a request to exit the low-power state.

CSYSACK

Output

Exit low-power state acknowledgement.

  • A HIGH-to-LOW transition indicates an acknowledgement of entering the low-power state.

  • A LOW-to-HIGH transition indicates an acknowledgement of exiting the low-power state.

CACTIVE

Output

Indicates that the CCI-400 requires the ACLK input to run.


ACTIVEMy signal

Table A.20 shows the signal.

Table A.20. ACTIVEMy signal

Signal

Direction

Description

ACTIVEMy

Output

Indicates that the master interface has active transactions. You can use it to gate the clock to downstream components.


QVN signals

Table A.21 shows the QVN signals.

Table A.21. QVN signals

Signal

Direction

Description[a]

VARQOSVNzMy[3:0]

Output

Read token request priority

VARVALIDVNzMy

Output

Read token request

VARREADYVNzMy

Input

Read token grant

VAWQOSVNzMy

Output

Write token request priority

VAWVALIDVNzMy

Output

Write token request

VAWREADYVNzMy

Input

Write token grant

VWVALIDVNzMy

Output

Write data token request

VWREADYVNzMy

Input

Write data token grant

[a] z is the virtual network number, 0-3.

y is the master interface number, 0-2.


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