3.3.8. Snoop Control Registers

The Snoop Control Register characteristics are:

Purpose

Controls the issuing of snoop and DVM requests on each slave interface. You can read the register to determine if the interface supports snoops or DVM messages. Enabling snoop or DVM requests on an interface that does not support them has no effect. One Snoop Control Register exists for each slave interface.

Usage constraints

Accessible using only Secure accesses, unless you set the Secure Access Register. See Table 3.4.

Configurations

Available in all CCI-400 configurations.

Attributes

Figure 3.7 shows the bit assignments.

Figure 3.7. Snoop Control Registers bit assignments

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Table 3.10 shows the bit assignments.

Table 3.10. Snoop Control Registers bit assignments

Bits

Reset

Access

Function

[31]

ACCHANNELEN input

R/WI

Slave interface supports DVM messages.

This is overridden to 0x0 if you set the Control Override Register [1]. See Control Override Register.

[30]

ACCHANNELEN input for S3 and S4

0x0 for S0, S1, and S2

R/WI

Slave interface supports snoops.

This is overridden to 0x0 if you set the Control Override Register [0]. See Control Override Register.

[29:2]

-

RAZ/WI

Reserved.

[1]

0b0

RW

Enable issuing of DVM message requests from this slave interface.

RAZ/WI for interfaces not supporting DVM messages:

0b0

Disable DVM message requests.

0b1

Enable DVM message requests.

[0]

0b0

RW

Enable issuing of snoop requests from this slave interface.

RAZ/WI for interfaces not supporting snoops:

0b0

Disable snoop requests.

0b1

Enable snoop requests.


Note

  • If the ACCHANNELEN input is LOW for this interface, write accesses to this register are ignored and snoop or DVM requests cannot be enabled.

  • If snoops are disabled in the Control Override Register, write accesses to the snoop enable bit[0] are ignored.

  • If DVM messages are disabled in the Control Override Register, write accesses to the DVM enable bit[1] are ignored.

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