CoreLink MMU-400 System Memory Management Unit Technical Reference ManualRevision: r0p0
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3.7.3. Performance Monitor Counter Group Stream Match Register

The Performance Monitor Counter Group Stream Match Register characteristics are:

Purpose

The Performance Monitor Counter Group Stream Match registers, PMCGSMRn, specify the Stream ID-based filtering of events counted in a counter group.

The number of ID and MASK bits actually present is configured for Stream_ID_Width as Configurable options describes. The unimplemented bits behave as RAZ/WI. An implementation provides the same number of ID and MASK bits for every implemented PMCGSMRn.

You can enable the Stream ID event filtering using the corresponding PMCGCRn.TCEFCFG field.

Attributes

Performance monitoring registers summary.

Figure 3.17 shows the Performance Monitor Counter Group Stream Match Register bit assignments.

Figure 3.17. Performance Monitor Counter Group Stream Match Register bit assignments

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Table 3.25 shows the Performance Monitor Counter Group Stream Match Register bit assignments.

Table 3.25. Performance Monitor Counter Group Stream Match Register bit assignments

BitsNameDescription
[31]RESERVEDRESERVED.
[15+STREAM_ID_WIDTH:16]MASK
MASK[i]==1

ID[i] is ignored.

MASK[i]==0

ID[i] is relevant to match.

[15:STREAM_ID_WIDTH]RESERVEDRESERVED.
[STREAM_ID_WIDTH-1:0]IDStream ID to match.

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