CoreLink MMU-400 System Memory Management Unit Technical Reference Manual: 3.4. The MMU-400 Global Register Space 0

CoreLink MMU-400 System Memory Management Unit Technical Reference Manual

Revision: r0p0

Home > Programmers Model > The MMU-400 Global Register Space 0

3.4. The MMU-400 Global Register Space 0

The MMU-400 Global Register Space 0 gives high-level control of the MMU-400 resources and maps device transactions to translation context banks. It contains the following registers:

Secure Configuration Register 0
Auxiliary Configuration Register
Identification registers
Debug registers
Secure Alias to Non-secure Configuration Register 0
Secure Alias to Non-secure Auxiliary Configuration Register
Stream Match registers
Stream to Context registers.

Copyright © 2011 ARM. All rights reserved.	ARM DDI 0472A
Non-Confidential	ID103111
PDF version

Home > Programmers Model > The MMU-400 Global Register Space 0