A.3.4. Read address channel signals

Table A.6 shows the AXI read address channel signals. Unless the description indicates otherwise, these signals are used by AXI3 and AXI4 protocols. For more information on each signal see the AMBA AXI and ACE Protocol Specification.

Table A.6. Write address channel signals

AXI signal NIC-400 adaptation[a]SourceDescription

Read address ID.

Where n is a variable.

  • For an ASIB, ID width {0-16} where 0 indicates that no value has been selected.

  • For an AMIB, either:

    • Global ID width {1-24}


    • if ID reduction has been selected, then the values can be viewed from the AMIBs ID reduction report from the GUI.


Read address


n is equal to address width -1.

Address width is in the range of 32-64 bits.

arlen_x[b][3:0]MasterBurst length for AXI3.
arlen_x[b][7:0]MasterBurst length for AXI4.
arsize_x[b][2:0]MasterBurst size.
arburst_x[b][1:0]MasterBurst type.
arlock_x[b][1:0]MasterLock type for AXI3.
arlock_x[b]MasterLock type for AXI4.
arcache_x[b][3:0]MasterMemory type.
arprot_x[b][2:0]MasterProtection type.
arqos_x[b][3:0]MasterQuality of Service, QoS. Only when enabled from the GUI.
arregion_x[b][3:0]MasterRegion identifier. Only when enabled from the GUI and from a master interface of the NIC-400.

User signal.


n is equal to user defined width -1.

A user defined width is in the range of 0-256 bits.

If 0 is selected then the signal is not used.

arvalid_x[b]MasterRead address valid.
arready_x[b]SlaveRead address ready.

[a] You can select uppercase or lowercase signal names from the GUI.

[b] Where x is:


for a bridge slave interface


for a bridge master interface


for a system slave interface or master interface.

Copyright © 2012 ARM. All rights reserved.ARM DDI 0475A