A.3.3. Write response channel signals

Table A.5 shows the AXI write response channel signals. Unless the description indicates otherwise, these signals are used by AXI3 and AXI4 protocols. For more information on each signal, see the ARM® AMBA® AXI and ACE Protocol Specification.

Table A.5. Write response channel signals

AXI signal NIC-400 adaptation[a]SourceDescription
bid_x[b][n:0]Slave

Response ID tag.

Where n is a variable:

  • For an ASIB, ID width {0-16} where 0 indicates that no value has been selected.

  • For an AMIB, one of the following parameters:

    • Global ID width {1-24}.

    • ID reduction. If selected, then the values can be viewed in the AMIBs ID reduction report from the GUI.

bresp_x[b][1:0]SlaveWrite response.
buser_x[b][n:0]Slave

User defined signal.

Where:

n is equal to user defined width -1.

A user defined width is in the range of 0-256 bits.

If 0 is selected then the signal is not used.

bvalid_x[b]SlaveWrite response valid.
bready_x[b]MasterWrite response ready.

[a] Where:

You can select uppercase or lowercase signal names from the GUI.

[b] Where x is:

<port_name>_s

For a bridge slave interface.

<port_name>_m

For a bridge master interface.

<port_name>

For a system slave interface or master interface.


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