3.2.2. Register blocks

This section contains the following subsections:

Address region control

Table 3.4 shows the address region control registers.

Table 3.4. Address region control registers

Address

offset

TypeWidth

Reset

value

NameDescription
0x0WO80x00remapRemap register. Up to eight remap bits are supported.
0x4WO---Reserved.
0x08WO1 - 160x0security0

Slave 0 security setting. This consists of one bit for non-virtual slaves, and up to 16 bits for virtual or APB master interfaces, and you can configure the register bits as follows:

0

Secure.

1

Non-secure.

Note

  • For virtual or APB master interfaces with 16 security setting bits, each bit position maps onto the region number. For example, the security0[5] bit is the security setting for the address region for master interface node number 2, region 5.

  • You can identify the correct master interface node number through using AMBA Designer during configuration.

0x0CWO1 - 160x0security1

Slave 1 security setting. This consists of one bit for non-virtual slaves, and up to 16 bits for virtual or APB master interfaces, and you can configure the register bits as follows:

0

Secure.

1

Non-secure.

Note

  • For virtual or APB master interfaces with 16 security setting bits, each bit position maps onto the region number. For example, the security1[5] bit is the security setting for the address region for master interface node number 3, region 5.

  • You can identify the correct master interface node number through using AMBA Designer during configuration.

0x10 - 0x104WO1 - 160x0security<n>

Slave n security setting. It contains one bit for non-virtual slaves, and up to 16 bits for APB master interfaces and you can configure the register bits as follows:

0

Secure.

1

Non-secure.

Note

  • For virtual or APB master interfaces with 16 security setting bits, each bit position maps onto the region number. For example, the security<n>[5] bit is the security setting for the address region for master interface node number <n> + 2, region 5.

  • You can identify the correct master interface node number through using AMBA Designer during configuration.

0x110 - 0xFFFRO---Reserved.

A configuration can contain a maximum of 64 security registers, that is, 1 < n < 64. Therefore, if the configuration contains 64 master interfaces, then register security 63 is 0x104. These registers are write-only because they are global accesses on the GPV.

Peripheral ID registers

If you configure any registers in the programmers view, Peripheral ID registers are always created. This provides a low gate count option for identification. Table 3.5 shows the Peripheral ID registers.

Table 3.5. Peripheral ID registers

Address

offset

TypeWidth

Reset

value

NameDescription
0x0 - 0xFCCRO---Reserved.
0xFD0RO80x04Peripheral ID44KB count, JEP106 continuation code.
0xFD4RO80x00Peripheral ID5Reserved.
0xFD8RO80x00Peripheral ID6Reserved.
0xFDCRO80x00Peripheral ID7Reserved.
0xFE0RO80x00Peripheral ID0Part Number [7:0].
0xFE4RO80xB4Peripheral ID1JEP106 Identity [3:0], part number [11:8].
0xFE8RO80x3BPeripheral ID2Part Revision, JEP106 code flag, JEP106 Identity [6:4].
0xFECRO80x00Peripheral ID3You can set this using the AMBA Designer Graphical User Interface (GUI).
0xFF0RO80x0DComponent ID0Preamble.
0xFF4RO80xF0Component ID1Generic IP component class, preamble.
0xFF8RO80x05Component ID2Preamble.
0xFFCRO80xB1Component ID3Preamble.

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