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| Home > Programmers Model > CTI register descriptions > CTI Trigger 2 to Channel Enable Register | |||
The CTIINEN2 Register characteristics are:
The CTI Trigger to Channel Enable Register 0 enables the signalling of an event on CTM channels when the core issues a trigger, CTITRIGIN, to the CTI. Within this register there is one bit for each of the four channels implemented. This register does not affect the application trigger operations.
There are no usage constraints.
This register is available in all configurations.
See the register summary in Table 3.119.
Figure 3.121 shows the assignments.
Table 3.127 shows the bit assignments.
Table 3.127. CTIINEN2 Register bit assignments
| Bits | Name | Function |
|---|---|---|
| [31:4] | Reserved | - |
| [3:0] | TRIGINEN | Enables a cross trigger event to the corresponding channel when an CTITRIGIN is activated. There is one bit of the field for each of the four channels. When a 1 is written to a bit in this register, it enables the CTITRIGIN signal to generate an event on the respective channel of the CTM. For example, TRIGINEN[0] set to 1 enables CTITRIGIN onto channel 0. Writing a 0 to any of the bits in this register disables the CTITRIGIN signal from generating an event on the respective channel of the CTM. Reading this register returns the programmed value. |