2.1.11. APB synchronous bridge

The APB synchronous bridge enables data transfer between two synchronous clock domains.

The AMBA compliant Low Power Interface (LPI) is optional on the APB synchronous bridge.

Figure 2.11 shows the external connections on the APB synchronous bridge.

Figure 2.11. APB synchronous bridge block diagram

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.


Copyright © 2011-2012 ARM. All rights reserved.ARM DDI 0480B
Non-ConfidentialID042612