3.13.26. Device Configuration register

The DEVID register characteristics are:

Purpose

Indicates the capabilities of the component.

Usage constraints

There are no usage constraints.

Configurations

This register is available in all configurations.

Attributes

See the register summary in Table 3.114.

Figure 3.132 shows the bit assignments.

Figure 3.132. DEVID register bit assignments

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.


Table 3.140 shows the bit assignments.

Table 3.140. DEVID register bit assignments

BitsNameFunction
[31:12]Reserved

-

[11]SWOUARTNRZ

Indicates whether Serial Wire Output, UART or NRZ, is supported.

0

Serial Wire Output, UART or NRZ, is not supported.

[10]SWOMAN

Indicates whether Serial Wire Output, Manchester encoded format, is supported.

0

Serial Wire Output, Manchester encoded format, is not supported.

[9]TCLKDATA

Indicates whether trace clock plus data is supported.

0

Trace clock and data is supported.

[8:6]FIFOSIZE

FIFO size in powers of 2.

0b010

FIFO size of 4 entries, that is, 16 bytes.

[5]CLKRELAT

Indicates the relationship between atclk and traceclkin.

1

atclk and traceclkin are asynchronous.

[4:0]MUXNUM

Indicates the hidden level of input multiplexing. When non-zero, this value indicates the type of multiplexing on the input to the ATB. Currently only 0x00 is supported, that is, no multiplexing is present. This value helps detect the ATB structure.


Copyright © 2011-2013 ARM. All rights reserved.ARM DDI 0480F
Non-ConfidentialID100313