3.13.11. Formatter Synchronization Counter Register

The FSCR characteristics are:

Purpose

Enables effective use on different sized TPAs without wasting large amounts of the storage capacity of the capture device. This counter contains the number of formatter frames since the last synchronization packet of 128 bits. It is a 12-bit counter with a maximum count value of 4096. This equates to synchronization every 65536 bytes, that is, 4096 packets x 16 bytes per packet. The default is set up for a synchronization packet every 1024 bytes, that is, every 64 formatter frames. If the formatter is configured for continuous mode, full and half-word sync frames are inserted during normal operation. Under these circumstances, the count value is the maximum number of complete frames between full synchronization packets.

Usage constraints

There are no usage constraints.

Configurations

This register is available in all configurations.

Attributes

See the register summary in Table 3.114.

Figure 3.117 shows the bit assignments.

Figure 3.117. FSCR bit assignments

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Table 3.125 shows the bit assignments.

Table 3.125. FSCR bit assignments

BitsNameFunction
[31:12]Reserved

-

[11:0]CycCount

12-bit counter value. Indicates the number of complete frames between full synchronization packets. The default value is 0x40.


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