3.18. Timestamp generator register summary

Table 3.246 shows the timestamp generator registers in offset order from the base memory address.

Table 3.246. Timestamp generator register summary

Offset Name TypeDescription
PSELCTRL region
0x000CNTCRRWCounter Control Register, CNTCR
0x004CNTSRROCounter Status Register, CNTSR
0x008CNTCVLRWCurrent Counter Value Lower register, CNTCVL
0x00CCNTCVURWCurrent Counter Value Upper register, CNTCVU
0x020CNTFID0RWBase Frequency ID register, CNTFID0
PSELCTRL region Management registers
0xFD0PIDR4ROPeripheral ID4 Register, PIDR4
0xFD4PIDR5RO

0x00, Reserved

0xFD8PIDR6RO

0x00, Reserved

0xFDCPIDR7RO

0x00, Reserved

0xFE0PIDR0ROPeripheral ID0 Register, PIDR0
0xFE4PIDR1ROPeripheral ID1 Register, PIDR1
0xFE8PIDR2ROPeripheral ID2 Register, PIDR2
0xFECPIDR3ROPeripheral ID3 Register, PIDR3
0xFF0CIDR0ROComponent ID0 Register, CIDR0
0xFF4CIDR1ROComponent ID1 Register, CIDR1
0xFF8CIDR2ROComponent ID2 Register, CIDR2
0xFFCCIDR3ROComponent ID3 Register, CIDR3
PSELREAD region
0x000CNTCVLROCurrent Counter Value Lower register, CNTCVL
0x004CNTCVUROCurrent Counter Value Upper register, CNTCVU
PSELREAD region Management registers
0xFD0PIDR4ROPeripheral ID4 Register, PIDR4
0xFD4PIDR5RO

Reserved

0xFD8PIDR6RO

Reserved

0xFDCPIDR7RO

Reserved

0xFE0PIDR0ROPeripheral ID0 Register, PIDR0
0xFE4PIDR1ROPeripheral ID1 Register, PIDR1
0xFE8PIDR2ROPeripheral ID2 Register, PIDR2
0xFECPIDR3ROPeripheral ID3 Register, PIDR3
0xFF0CIDR0ROComponent ID0 Register, CIDR0
0xFF4CIDR1ROComponent ID1 Register, CIDR1
0xFF8CIDR2ROComponent ID2 Register, CIDR2
0xFFCCIDR3ROComponent ID3 Register, CIDR3

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