3.14. CTI register summary

Table 3.151 shows the CTI registers in offset order from the base memory address.

Table 3.151. CTI register summary

Offset

Name

Type

Reset

Description

0x000CTICONTROLRW0x00000000CTI Control register
0x010CTIINTACKWO0x00000000CTI Interrupt Acknowledge register
0x014CTIAPPSETRW0x00000000CTI Application Trigger Set register
0x018CTIAPPCLEARWO0x00000000CTI Application Trigger Clear register
0x01CCTIAPPPULSEWO0x00000000CTI Application Pulse register
0x020CTIINEN0RW0x00000000CTI Trigger 0 to Channel Enable register
0x024CTIINEN1RW0x00000000CTI Trigger 1 to Channel Enable register
0x028CTIINEN2RW0x00000000CTI Trigger 2 to Channel Enable register
0x02CCTIINEN3RW0x00000000CTI Trigger 3 to Channel Enable register
0x030CTIINEN4RW0x00000000CTI Trigger 4 to Channel Enable register
0x034CTIINEN5RW0x00000000CTI Trigger 5 to Channel Enable register
0x038CTIINEN6RW0x00000000CTI Trigger 6 to Channel Enable register
0x03CCTIINEN7RW0x00000000CTI Trigger 7 to Channel Enable register
0x0A0CTIOUTEN0RW0x00000000CTI Channel to Trigger 0 Enable register
0x0A4CTIOUTEN1RW0x00000000CTI Channel to Trigger 1 Enable register
0x0A8CTIOUTEN2RW0x00000000CTI Channel to Trigger 2 Enable register
0x0ACCTIOUTEN3RW0x00000000CTI Channel to Trigger 3 Enable register
0x0B0CTIOUTEN4RW0x00000000CTI Channel to Trigger 4 Enable register
0x0B4CTIOUTEN5RW0x00000000CTI Channel to Trigger 5 Enable register
0x0B8CTIOUTEN6RW0x00000000CTI Channel to Trigger 6 Enable register
0x0BCCTIOUTEN7RW0x00000000CTI Channel to Trigger 7 Enable register
0x130CTITRIGINSTATUSRO0x00000000CTI Trigger In Status register
0x134CTITRIGOUTSTATUSRO0x00000000CTI Trigger Out Status register
0x138CTICHINSTATUSRO0x00000000CTI Channel In Status register
0x13CCTICHOUTSTATUSRO0x00000000CTI Channel Out Status register
0x140CTIGATERW0x0000000FEnable CTI Channel Gate register
0x144asicctlRW0x00000000External Multiplexer Control register
0xEDCITCHINACKWO0x00000000Integration Test Channel Input Acknowledge register
0xEE0ITTRIGINACKWO0x00000000Integration Test Trigger Input Acknowledge register
0xEE4ITCHOUTWO0x00000000Integration Test Channel Output register
0xEE8ITTRIGOUTWO0x00000000Integration Test Trigger Output register
0xEECITCHOUTACKRO0x00000000Integration Test Channel Output Acknowledge register
0xEF0ITTRIGOUTACKRO0x00000000Integration Test Trigger Output Acknowledge register
0xEF4ITCHINRO0x00000000Integration Test Channel Input register
0xEF8ITTRIGINRO0x00000000Integration Test Trigger Input register
0xF00ITCTRLRW0x00000000Integration Mode Control register
0xFA0CLAIMSETRW0x0000000FClaim Tag Set register
0xFA4CLAIMCLRRW0x00000000Claim Tag Clear register
0xFB0LARWO0x00000000Lock Access Register
0xFB4LSRRO0x00000003Lock Status Register
0xFB8AUTHSTATUSRO0x00000005Authentication Status register
0xFC8DEVIDRO0x00040800Device Configuration register
0xFCCDEVTYPERO0x00000014Device Type Identifier register
0xFD0PIDR4RO0x00000004Peripheral ID4 Register

0xFD4

-

-

-

Reserved

0xFD8

-

-

-

Reserved

0xFDC

-

-

-

Reserved

0xFE0PIDR0RO0x00000006Peripheral ID0 Register
0xFE4PIDR1RO0x000000B9Peripheral ID1 Register
0xFE8PIDR2RO0x0000004BPeripheral ID2 Register
0xFECPIDR3RO0x00000000Peripheral ID3 Register
0xFF0CIDR0RO0x0000000DComponent ID0 Register
0xFF4CIDR1RO0x00000090Component ID1 Register
0xFF8CIDR2RO0x00000005Component ID2 Register
0xFFCCIDR3RO0x000000B1Component ID3 Register

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