3.12. TPIU register summary

Table 3.114 shows the TPIU registers in offset order from the base memory address.

Table 3.114. TPIU register summary

Offset

Name

Type

Reset

Description

0x000Supported_Port_SizesRO0x00000001Supported Port Size register
0x004Current_port_sizeRW0x00000001Current Port Size register
0x100Supported_trigger_modesRO0x0000011FSupported Trigger Modes register
0x104Trigger_counter_valueRW0x00000000Trigger Counter Value register
0x108Trigger_multiplierRW0x00000000Trigger Multiplier register
0x200Supported_test_pattern_modesRO0x0003000FSupported Test Patterns/Modes register
0x204Current_test_pattern_modeRW0x00000000Current Test Pattern/Modes register
0x208TPRCRRW0x00000000TPIU Test Pattern Repeat Counter Register
0x300FFSRRO 0x00000000Formatter and Flush Status Register
0x304FFCRRW0x00000000Formatter and Flush Control Register
0x308FSCRRW0x00000040Formatter Synchronization Counter Register
0x400EXTCTL_In_PortRO0x00000000TPIU EXCTL In Port register
0x404EXTCTL_Out_PortRW0x00000000TPIU EXCTL Out Port register
0xEE4ITTRFLINACKWO0x00000000Integration Test Trigger In and Flush In Acknowledge register
0xEE8ITTRFLINRO 0x00000000Integration Test Trigger In and Flush In register
0xEECITATBDATA0RO 0x00000000Integration Test ATB Data register 0
0xEF0ITATBCTR2WO0x00000000Integration Test ATB Control Register 2
0xEF4ITATBCTR1RO 0x00000000Integration Test ATB Control Register 1
0xEF8ITATBCTR0RO 0x00000000Integration Test ATB Control Register 0
0xF00ITCTRLRW0x00000000Integration Mode Control register
0xFA0CLAIMSETRW0x0000000FClaim Tag Set register
0xFA4CLAIMCLRRW0x00000000Claim Tag Clear register
0xFB0LARWO0x00000000Lock Access Register
0xFB4LSRRO0x00000003Lock Status Register
0xFB8AUTHSTATUSRO0x00000000Authentication Status register
0xFC8DEVIDRO0x000000A0Device Configuration register
0xFCCDEVTYPERO0x00000011Device Type Identifier register
0xFD0PIDR4RO0x00000004Peripheral ID4 Register

0xFD4

-

-

-

Reserved

0xFD8

-

-

-

Reserved

0xFDC

-

-

-

Reserved

0xFE0PIDR0RO0x00000012Peripheral ID0 Register
0xFE4PIDR1RO0x000000B9Peripheral ID1 Register
0xFE8PIDR2RO0x0000004BPeripheral ID2 Register
0xFECPIDR3RO0x00000000Peripheral ID3 Register
0xFF0CIDR0RO0x0000000DComponent ID0 Register
0xFF4CIDR1RO0x00000090Component ID1 Register
0xFF8CIDR2RO0x00000005Component ID2 Register
0xFFCCIDR3RO0x000000B1Component ID3 Register

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