ARM CoreSight SoC-400 Technical Reference ManualRevision: r3p1
Home > Programmers Model > ETB register descriptions > Integration Test ATB Control Register 2

3.11.15. Integration Test ATB Control Register 2

The ITATBCTR2 characteristics are:

Purpose

Enables control of the atreadys and afvalids outputs of the ETB.

Usage constraints

There are no usage constraints.

Configurations

This register is available in all configurations.

Attributes

See the register summary in Table 3.79.

Figure 3.87 shows the bit assignments.

Figure 3.87. ITATBCTR2 bit assignments

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.


Table 3.94 shows the bit assignments.

Table 3.94. ITATBCTR2 bit assignments

BitsNameFunction
[31:2]Reserved

-

[1]AFVALIDS

Sets the value of afvalids.

0

Sets the value of afvalids to 0.

1

Sets the value of afvalids to 1.

[0]ATREADYS

Sets the value of atreadys.

0

Sets the value of atreadys to 0.

1

Sets the value of atreadys to 1.


Copyright © 2011-2013 ARM. All rights reserved.ARM DDI 0480F
Non-ConfidentialID100313
PDF file icon  PDF version
Home > Programmers Model > ETB register descriptions > Integration Test ATB Control Register 2