A.4.5. Narrow timestamp synchronous bridge signals

Table A.26 shows the narrow timestamp synchronous bridge signals.

Table A.26. Narrow timestamp synchronous bridge signals

Name

Type

Clock domain

Description

clk

Input

clk

Clock.

resetn

Input

clk

Reset.

clkens

Input

clk

Clock enable.

clkenm

Input

clk

Clock enable.

tsbits[6:0]

Input

clk

Timestamp encoded value.

tssyncs[1:0]

Input

clk

Timestamp synchronization bits.

tssyncreadym

Input

clk

Timestamp slave ready.

csysreq[a]

Input

clk

Clock powerdown request.

tssyncreadys

Output

clk

Timestamp slave ready.

tsbitm[6:0]

Output

clk

Timestamp encoded value.

tssyncm[1:0]

Output

clk

Timestamp synchronization bits.

csysack[a]

Output

clk

Clock powerdown acknowledge.

cactive[a]

Output

clk

Clock is required when driven HIGH.

[a] This signal is only present if you configure the device to have an LPI.


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