A.3.5. ATB asynchronous bridge signals

Table A.18 shows the ATB asynchronous bridge signals.

Table A.18. ATB asynchronous bridge signals

NameTypeClock domainDescription
clksInputclksATB clock.
resetsnInputclksATB reset.
clkensInputclksATB clock enable.
clkmInputclkmATB clock.
resetmnInputclkmATB reset.
clkenmInputclkmATB clock enable.
atvalidsInputclksATB valid signal.
atreadymInputclkmATB transfer ready.
atids[6:0]InputclksATB ID for the present trace data.
atbytess[bw:0][a]InputclksATB number of valid bytes, LSB aligned, on the slave port.
atdatas[dw:0][b]InputclksATB trace data.
afvalidmInputclkmATB data flush request.
afreadysInputclksATB data flush complete.
afreadymInputclkmATB data flush complete.
syncreqmInputclksSynchronization request.
csysreq[c]Input clkmClock powerdown request.
atvalidmOutputclksATB valid signal.
atreadysOutputclksATB transfer ready.
atidm[6:0]OutputclkmATB ID for the present trace data.
atbytesm[bw:0][a]OutputclkmATB number of valid bytes, LSB aligned, on the master port.
atdatam[dw:0]OutputclkmATB trace data.
afvalidsOutputclksATB data flush request.
syncreqsOutputclksSynchronization request.
cactive[c]Output clkmClock is required when driven HIGH.
csysack[c]Output clkmClock powerdown acknowledge.

[a] Where bw has a range of 0-3.

[b] Where dw is either 7, 15, 31, or 63.

[c] This signal is only present if you configure the device to have an LPI.

Cross-domain connections

The ATB asynchronous bridge can be configured as a separate master interface component and slave interface component. If you configure the bridge in this way, then you must connect the two components as Table A.19 shows.

Table A.19 shows ATB asynchronous bridge cross-domain connections.

Table A.19. ATB asynchronous bridge cross-domain connections

Slave component signal TypeMaster component signalType
atb_rev_data_in Inputatb_rev_data_outOutput

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