3.13.20. Integration Mode Control register

The ITCTRL register characteristics are:

Purpose

Enables topology detection. See the ARM® CoreSight™ Architecture Specification.

This register enables the component to switch from a functional mode, the default behavior, to integration mode where the inputs and outputs of the component can be directly controlled for integration testing and topology detection.

Note

When a device is in integration mode, the intended functionality might not be available.

After performing integration or topology detection, you must reset the system to ensure correct behavior of CoreSight and other connected system components that the integration or topology detection can affect.

The registers in the TPIU enable the system to set the flushinack and triginack output pins. The flushin and trigin inputs to the TPIU can also be read. The other Integration Test registers are for testing the integration of the ATB slave interface on the TPIU.

Usage constraints

There are no usage constraints.

Configurations

This register is available in all configurations.

Attributes

See the register summary in Table 3.114.

Figure 3.126 shows the bit assignments.

Figure 3.126. ITCTRL register bit assignments

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Table 3.134 shows the bit assignments.

Table 3.134. ITCTRL register bit assignments

BitsNameFunction
[31:1]Reserved

-

[0]IME

Integration Mode Enable.

0

Disable integration mode.

1

Enable integration mode.


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