3.18. Timestamp generator register summary

Table 3.246 shows the timestamp generator registers in offset order from the base memory address.

Table 3.246. Timestamp generator register summary

Offset Name TypeResetDescription
PSELCTRL region
0x000CNTCRRW0x00000000Counter Control Register, CNTCR
0x004CNTSRRO0x00000000Counter Status Register, CNTSR
0x008CNTCVLRW0x00000000Current Counter Value Lower register, CNTCVL
0x00CCNTCVURW0x00000000Current Counter Value Upper register, CNTCVU
0x020CNTFID0RW0x00000000Base Frequency ID register, CNTFID0
PSELCTRL region Management registers
0xFD0PIDR4RO0x00000004Peripheral ID4 Register, PIDR4
0xFD4PIDR5RO0x00000000

0x00, Reserved

0xFD8PIDR6RO0x00000000

0x00, Reserved

0xFDCPIDR7RO0x00000000

0x00, Reserved

0xFE0PIDR0RO0x00000001Peripheral ID0 Register, PIDR0
0xFE4PIDR1RO0x000000B1Peripheral ID1 Register, PIDR1
0xFE8PIDR2RO0x0000001BPeripheral ID2 Register, PIDR2
0xFECPIDR3RO0x00000000Peripheral ID3 Register, PIDR3
0xFF0CIDR0RO0x0000000DComponent ID0 Register, CIDR0
0xFF4CIDR1RO0x000000F0Component ID1 Register, CIDR1
0xFF8CIDR2RO0x00000005Component ID2 Register, CIDR2
0xFFCCIDR3RO0x000000B1Component ID3 Register, CIDR3
PSELREAD region
0x000CNTCVLRO0x00000000Current Counter Value Lower register, CNTCVL
0x004CNTCVURO0x00000000Current Counter Value Upper register, CNTCVU
PSELREAD region Management registers
0xFD0PIDR4RO0x00000004Peripheral ID4 Register, PIDR4
0xFD4PIDR5RO0x00000000

Reserved

0xFD8PIDR6RO0x00000000

Reserved

0xFDCPIDR7RO0x00000000

Reserved

0xFE0PIDR0RO0x00000001Peripheral ID0 Register, PIDR0
0xFE4PIDR1RO0x000000B1Peripheral ID1 Register, PIDR1
0xFE8PIDR2RO0x0000001BPeripheral ID2 Register, PIDR2
0xFECPIDR3RO0x00000000Peripheral ID3 Register, PIDR3
0xFF0CIDR0RO0x0000000DComponent ID0 Register, CIDR0
0xFF4CIDR1RO0x000000F0Component ID1 Register, CIDR1
0xFF8CIDR2RO0x00000005Component ID2 Register, CIDR2
0xFFCCIDR3RO0x000000B1Component ID3 Register, CIDR3

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