3.3.2. Debug Power Acknowledge register

The CPWRUPACK register characteristics are:

Purpose

Returns the value of the cpwrupack input port. Each bit in this register reflects the status of a powerup request.

Usage constraints

There are no usage constraints.

Configurations

This register is available in all configurations.

The number of fields implemented in this register depends on the configuration of the component.

Attributes

See the register summary in Table 3.1.

There is a one to one mapping between the register locations and the CPWRUPACK bits.

Table 3.3 shows the bit assignments.

Table 3.3. CPWRUPACK register bit assignments

BitsNameFunction
[31]CPWRUPACKBit31

Bit[31] of the cpwrupack input port:

0

cpwrupack[31] input port is LOW.

1

cpwrupack[31] input port is HIGH.

[30]CPWRUPACKBit30

Bit[30] of the cpwrupack input port:

0

cpwrupack[30] input port is LOW.

1

cpwrupack[30] input port is HIGH.

[29]CPWRUPACKBit29

Bit[29] of the cpwrupack input port:

0

cpwrupack[29] input port is LOW.

1

cpwrupack[29] input port is HIGH.

[28]CPWRUPACKBit28

Bit[28] of the cpwrupack input port:

0

cpwrupack[28] input port is LOW.

1

cpwrupack[28] input port is HIGH.

[27]CPWRUPACKBit27

Bit[27] of the cpwrupack input port:

0

cpwrupack[27] input port is LOW.

1

cpwrupack[27] input port is HIGH.

[26]CPWRUPACKBit26

Bit[26] of the cpwrupack input port:

0

cpwrupack[26] input port is LOW.

1

cpwrupack[26] input port is HIGH.

[25]CPWRUPACKBit25

Bit[25] of the cpwrupack input port:

0

cpwrupack[25] input port is LOW.

1

cpwrupack[25] input port is HIGH.

[24]CPWRUPACKBit24

Bit[24] of the cpwrupack input port:

0

cpwrupack[24] input port is LOW.

1

cpwrupack[24] input port is HIGH.

[23]CPWRUPACKBit23

Bit[23] of the cpwrupack input port:

0

cpwrupack[23] input port is LOW.

1

cpwrupack[23] input port is HIGH.

[22]CPWRUPACKBit22

Bit[22] of the cpwrupack input port:

0

cpwrupack[22] input port is LOW.

1

cpwrupack[22] input port is HIGH.

[21]CPWRUPACKBit21

Bit[21] of the cpwrupack input port:

0

cpwrupack[21] input port is LOW.

1

cpwrupack[21] input port is HIGH.

[20]CPWRUPACKBit20

Bit[20] of the cpwrupack input port:

0

cpwrupack[20] input port is LOW.

1

cpwrupack[20] input port is HIGH.

[19]CPWRUPACKBit19

Bit[19] of the cpwrupack input port:

0

cpwrupack[19] input port is LOW.

1

cpwrupack[19] input port is HIGH.

[18]CPWRUPACKBit18

Bit[18] of the cpwrupack input port:

0

cpwrupack[18] input port is LOW.

1

cpwrupack[18] input port is HIGH.

[17]CPWRUPACKBit17

Bit[17] of the cpwrupack input port:

0

cpwrupack[17] input port is LOW.

1

cpwrupack[17] input port is HIGH.

[16]CPWRUPACKBit16

Bit[16] of the cpwrupack input port:

0

cpwrupack[16] input port is LOW.

1

cpwrupack[16] input port is HIGH.

[15]CPWRUPACKBit15

Bit[15] of the cpwrupack input port:

0

cpwrupack[15] input port is LOW.

1

cpwrupack[15] input port is HIGH.

[14]CPWRUPACKBit14

Bit[14] of the cpwrupack input port:

0

cpwrupack[14] input port is LOW.

1

cpwrupack[14] input port is HIGH.

[13]CPWRUPACKBit13

Bit[13] of the cpwrupack input port:

0

cpwrupack[13] input port is LOW.

1

cpwrupack[13] input port is HIGH.

[12]CPWRUPACKBit12

Bit[12] of the cpwrupack input port:

0

cpwrupack[12] input port is LOW.

1

cpwrupack[12] input port is HIGH.

[11]CPWRUPACKBit11

Bit[11] of the cpwrupack input port:

0

cpwrupack[11] input port is LOW.

1

cpwrupack[11] input port is HIGH.

[10]CPWRUPACKBit10

Bit[10] of the cpwrupack input port:

0

cpwrupack[10] input port is LOW.

1

cpwrupack[10] input port is HIGH.

[9]CPWRUPACKBit9

Bit[9] of the cpwrupack input port:

0

cpwrupack[9] input port is LOW.

1

cpwrupack[9] input port is HIGH.

[8]CPWRUPACKBit8

Bit[8] of the cpwrupack input port:

0

cpwrupack[8] input port is LOW.

1

cpwrupack[8] input port is HIGH.

[7]CPWRUPACKBit7

Bit[7] of the cpwrupack input port:

0

cpwrupack[7] input port is LOW.

1

cpwrupack[7] input port is HIGH.

[6]CPWRUPACKBit6

Bit[6] of the cpwrupack input port:

0

cpwrupack[6] input port is LOW.

1

cpwrupack[6] input port is HIGH.

[5]CPWRUPACKBit5

Bit[5] of the cpwrupack input port:

0

cpwrupack[5] input port is LOW.

1

cpwrupack[5] input port is HIGH.

[4]CPWRUPACKBit4

Bit[4] of the cpwrupack input port:

0

cpwrupack[4] input port is LOW.

1

cpwrupack[4] input port is HIGH.

[3]CPWRUPACKBit3

Bit[3] of the cpwrupack input port:

0

cpwrupack[3] input port is LOW.

1

cpwrupack[3] input port is HIGH.

[2]CPWRUPACKBit2

Bit[2] of the cpwrupack input port:

0

cpwrupack[2] input port is LOW.

1

cpwrupack[2] input port is HIGH.

[1]CPWRUPACKBit1

Bit[1] of the cpwrupack input port

0

cpwrupack[1] input port is LOW.

1

cpwrupack[1] input port is HIGH.

[0]CPWRUPACKBit0

Bit[0] of the cpwrupack input port:

0

cpwrupack[0] input port is LOW.

1

cpwrupack[0] input port is HIGH.


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