ARM CoreSight SoC-400 Technical Reference ManualRevision: r3p2
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3.13.6. Supported Test Patterns/Modes register

The Supported_test_pattern_modes register characteristics are:

Purpose

Provides a set of known bit sequences or patterns that can be output over the trace port and can be detected by the TPA or other associated trace capture device.

Usage constraints

There are no usage constraints.

Configurations

This register is available in all configurations.

Attributes

See the register summary in Table 3.114.

Figure 3.112 shows the bit assignments.

Figure 3.112. Supported_test_pattern_modes register bit assignments

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Table 3.120 shows the bit assignments.

Table 3.120. Supported_test_pattern_modes register bit assignments

BitsNameFunction
[31:18]Reserved

-

[17]PCONTEN

Indicates whether continuous mode is supported.

1

Mode supported.

[16]PTIMEEN

Indicates whether timed mode is supported.

1

Mode supported.

[15:4]Reserved

-

[3]PATF0

Indicates whether the FF/00 pattern is supported as output over the trace port.

1

Pattern supported.

[2]PATA5

Indicates whether the AA/55 pattern is supported as output over the trace port.

1

Pattern supported.

[1]PATW0

Indicates whether the walking 0s pattern is supported as output over the trace port.

1

Pattern supported.

[0]PATW1

Indicates whether the walking 1s pattern is supported as output over the trace port.

1

Pattern supported.


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