3.13.10. Formatter and Flush Control Register

The FFCR characteristics are:

Purpose

Controls the generation of stop, trigger, and flush events. To disable formatting and put the formatter into bypass mode, bits[1:0] must be 0. Setting both bits is the same as setting bit[1]. All three flush-generating conditions can be enabled together. However, if a second or third flush event is generated from another condition then the current flush completes before the next flush is serviced.

Flush from flushin takes priority over flush from trigger, which in turn completes before a manually-activated flush. All trigger indication conditions can be enabled simultaneously although this can cause the appearance of multiple triggers if flush using trigger is also enabled. Both Stop On settings can be enabled although if Flush on Trigger is set up, none of the flushed data is stored. When the system stops, it returns atreadys and does not store the accepted data packets. This is to avoid stalling of any other devices that are connected to a trace replicator. If an event in the FFCR is required, it must be enabled before the originating event starts. Because requests from flushes and triggers can originate in an asynchronous clock domain, the exact time the component acts on the request cannot be determined during control configuration. To perform a stop on flush completion through a manually generated flush request, two write operations to the register are required:

  • One to enable the stop event, if it is not already enabled

  • One to generate the manual flush.

Note

ARM recommends that you change the trace port width without enabling continuous mode. Enabling continuous mode causes data to be sent from the trace port and modifying the port size can result in data not being aligned for power 2 port widths.

Usage constraints

There are no usage constraints.

Configurations

This register is available in all configurations.

Attributes

See the register summary in Table 3.114.

Figure 3.116 shows the bit assignments.

Figure 3.116. FFCR bit assignments

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Table 3.124 shows the bit assignments.

Table 3.124. FFCR bit assignments

BitsNameFunction
[31:14]Reserved

-

[13]StopTrig

Stops the formatter after a trigger event is observed. Reset to disabled or 0.

0

Disable stopping the formatter after a trigger event is observed.

1

Enable stopping the formatter after a trigger event is observed.

[12]StopFl

Forces the FIFO to drain off any part-completed packets.

The reset value is 0.

0

Disable stopping the formatter on return of afreadys.

1

Enable stopping the formatter on return of afreadys.

[11]Reserved

-

[10]TrigFl

Indicates a trigger when flush completion on afreadys is returned.

0

Disable trigger indication on return of afreadys.

1

Enable trigger indication on return of afreadys.

[9]TrigEvt

Indicates a trigger on a trigger event.

0

Disable trigger indication on a trigger event.

1

Enable trigger indication on a trigger event.

[8]TrigIn

Indicates a trigger when trigin is asserted.

0

Disable trigger indication when trigin is asserted.

1

Enable trigger indication when trigin is asserted.

[7]Reserved

-

[6]FOnMan_W

Generates a flush. This bit is set to 1 when the flush has been serviced.

The reset value is 0.

0

Manual flush is not initiated.

1

Manual flush is initiated.

[6]FOnMan_R

Generates a flush. This bit is set to 0 when this flush is serviced.

The reset value is 0.

0

Manual flush is not initiated.

1

Manual flush is initiated.

[5]FOnTrig

Initiates a manual flush of data in the system when a trigger event occurs.

The reset value is 0.

A trigger event occurs when the trigger counter reaches 0, or, if the trigger counter is 0, when trigin is HIGH.

0

Disable generation of flush when a Trigger Event occurs.

1

Enable generation of flush when a Trigger Event occurs.

[4]FOnFlIn

Enables the use of the flushin connection.

The reset value is 0.

0

Disable generation of flush using the flushin interface.

1

Enable generation of flush using the flushin interface.

[3:2]Reserved

-

[1]EnFCont

Is embedded in trigger packets and indicates that no cycle is using sync packets.

The reset value is 0.

Note

This bit can only be changed when FtStopped is HIGH.

0

Continuous formatting disabled.

1

Continuous formatting enabled.

[0]EnFTC

Do not embed triggers into the formatted stream. Trace disable cycles and triggers are indicated by tracectl, where present.

The reset value is 0.

Note

This bit can only be changed when FtStopped is HIGH.

0

Formatting disabled.

1

Formatting enabled.


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