2.1.3. DAPBUS asynchronous bridge

The DAPBUS asynchronous bridge enables data transfer between two asynchronous clock domains within the DAP sub system. The DAPBUS asynchronous bridge is designed to exist across two power domains and provides a Low-power Interface (LPI).

The DAPBUS asynchronous bridge has the following key features:

Figure 2.3 shows the external connections on the DAPBUS asynchronous bridge.

Figure 2.3. DAPBUS asynchronous bridge block diagram

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