4.6. JTAG-AP

The JTAG-AP provides JTAG access to on-chip components, operating as a JTAG master port to drive JTAG chains throughout a SoC. The JTAG command protocol is byte-oriented, with a word wrapper on the read and write ports to yield acceptable performance from the 32-bit internal data bus in the DAP. Daisy chaining is avoided by using a port multiplexer. In this way, slower cores do not impede faster cores. See the ARM® Debug Interface Architecture Specification, ADIv5.0 to ADIv5.2.

The implementation-specific features of the JTAG-AP are described in the following sections:

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