5.2.1. Clock and reset

The clocks and resets of the APB asynchronous bridge are:

pclkm

Clock for master interface.

pclkenm

Clock enable for master interface.

presetmn

Active-LOW reset for master interface. This is asynchronously asserted and must be synchronously deasserted.

pclks

Clock for slave interface.

pclkens

Clock enable for slave interface.

presetsn

Active-LOW reset for slave interface. This is asynchronously asserted and must be synchronously deasserted.

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