6.6.3. Operation

The ATB synchronous bridge can implement a trace buffer to supplement the buffers of the trace sources in your system. When only a small trace buffer is required, this can be a lower-area alternative to implementing an Embedded Trace FIFO (ETF), which is provided by the TMC product, licensed separately.

The bridge can be used as a register slice, by selecting the smallest buffer size and tying both clock enable inputs HIGH.

Special considerations apply when using the clock enable inputs to interface between synchronous clock domains. For more information, see the ARM® CoreSight™ SoC-400 Integration Manual.

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