6.2. MPU register summary

Table 6.1 shows the MPU registers. Each of these registers is 32 bits wide. If the MPU is not present in the implementation, then all of these registers read as zero.

Table 6.1. MPU registers

NameDescription
MPU_TYPEMPU Type Register.
MPU_CTRLMPU Control Register.
MPU_RNRMPU Region Number Register.
MPU_RBARMPU Region Base Address Register.
MPU_RASRMPU Region Attribute and Size Register.

Note

  • See the ARMv6-M Architecture Reference Manual for more information about the MPU registers and their addresses, access types, and reset values.

  • The MPU supports region sizes from 256-bytes to 4Gb, with 8-sub regions per region.

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