4.5.17. Data Fault Status Register

The DFSR characteristics are:

Purpose

Holds status information about the last data fault.

Usage constraints

The accessibility to the DFSR by Exception level is:

EL0EL1(NS)EL1(S)EL2EL3(SCR.NS = 1)EL3(SCR.NS = 0)
-RWRWRWRWRW
Configurations

The DFSR is Banked for Secure and Non-secure states.

The architectural mapping of the DFSR is:

Attributes

See the register summary in Table 4.86.

There are two formats for this register. The value of TTBCR.EAE selects which format of the register is used. The two formats are:

DFSR format when using the Short-descriptor translation table format

Figure 4.91 shows the DFSR bit assignments when using the Short-descriptor translation table format.

Figure 4.91. DFSR bit assignments for Short-descriptor translation table format

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Table 4.125 shows the DFSR bit assignments when using the Short-descriptor translation table format.

Table 4.125. DFSR bit assignments for Short-descriptor translation table format

BitsNameFunction
[31:16]-

Reserved, res0.

[15]UA

Unattributable fault. This bit is only set for System Errors. For other faults, it is res0. The values are:

0

Attributable, can be attributed to the processing element counting the event.

1

Unattributable, cannot be attributed to any particular processor.

[14]UC

Uncontainable fault. This bit is only set for System Errors. For other faults, it is res0. The values are:

0

Containable, an attributable event that can be contained to a particular code sequence.

1

Uncontainable, cannot be contained to a particular code sequence.

Unattributable events are Uncontainable.

[13]CM

Cache maintenance fault. For synchronous faults, this bit indicates whether a cache maintenance operation generated the fault. The values are:

0

Abort not caused by a cache maintenance operation.

1

Abort caused by a cache maintenance operation.

On an asynchronous fault, this bit is unknown.

[12]ExT

External abort type. This field indicates whether an AXI decode or slave error caused an abort:

0

External abort marked as DECERR.

1

External abort marked as SLVERR.

For aborts other than external aborts this bit always returns 0.

[11]WnR

Write not Read bit. This field indicates whether a write or a read access caused the abort:

0

Abort caused by a read access.

1

Abort caused by a write access.

For faults on CP15 cache maintenance operations, including the VA to PA translation operations, this bit always returns a value of 1.

[10]FS[4]Part of the Fault Status field. See bits[3:0] in this table.
[9]LPAE

Large physical address extension. The value of the format descriptor is:

0

Short-descriptor translation table formats.

[8]-

Reserved, res0.

[7:4]Domain

The domain of the fault address. Use of the field is deprecated.

[3:0]FS[3:0]

Fault Status bits. This field indicates the type of exception generated. The possible values are:

0b00001

Alignment fault.

0b01100

Synchronous external abort on translation table walk, 1st level.

0b01110

Synchronous external abort on translation table walk, 2nd level.

0b11100

Synchronous parity error on translation table walk, 1st level.

0b11110

Synchronous parity error on translation table walk, 2nd level.

0b00101

Translation fault, 1st level.

0b00111

Translation fault, 2nd level.

0b00011

Access flag fault, 1st level.

0b00110

Access flag fault, 2nd level.

0b01001

Domain fault, 1st level.

0b01011

Domain fault, 2nd level.

0b01101

Permission fault, 1st level.

0b01111

Permission fault, 2nd level.

0b00010

Debug event.

0b01000

Synchronous external abort, non-translation.

0b11001

Synchronous parity error on memory access.

0b10110

Asynchronous external abort.

0b11000

Asynchronous parity error on memory access.

All other values are reserved.


DFSR format when using the Long-descriptor translation table format

Figure 4.92 shows the DFSR bit assignments when using the Long-descriptor translation table format.

Figure 4.92. DFSR bit assignments for Long-descriptor translation table format

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Table 4.126 shows the DFSR bit assignments when using the Long-descriptor translation table format.

Table 4.126. DFSR bit assignments for Long-descriptor translation table format

BitsNameFunction
[31:16]-

Reserved, res0.

[15]UA

Unattributable fault. This bit is only set for System Errors. For other faults, it is res0. The values are:

0

Attributable, can be attributed to the processing element counting the event.

1

Unattributable, cannot be attributed to any particular processor.

[14]UC

Uncontainable fault. This bit is only set for System Errors. For other faults, it is res0. The values are:

0

Containable, an attributable event that can be contained to a particular code sequence.

1

Uncontainable, cannot be contained to a particular code sequence.

Unattributable events are Uncontainable.

[13]CM

Cache maintenance fault. For synchronous faults, this bit indicates whether a cache maintenance operation generated the fault:

0

Abort not caused by a cache maintenance operation.

1

Abort caused by a cache maintenance operation.

On an asynchronous fault, this bit is unknown.

[12]ExT

External abort type. This field indicates whether an AXI decode or slave error caused an abort:

0

External abort marked as DECERR.

1

External abort marked as SLVERR.

For aborts other than external aborts this bit always returns 0.

[11]WnR

Write not Read bit. This field indicates whether a write or a read access caused the abort:

0

Abort caused by a read access.

1

Abort caused by a write access.

For faults on CP15 cache maintenance operations, including the VA to PA translation operations, this bit always returns a value of 1.

[10]-

Reserved, res0.

[9]LPAE

Large physical address extension. The value of the format descriptor is:

1

Long-descriptor translation table formats.

[8:6]-

Reserved, res0.

[5:0]Status

Fault Status bits. This field indicates the type of exception generated. The possible values are:

0b0000LL

Address size fault, LL bits indicate level.

0b0001LL

Translation fault, LL bits indicate level.

0b0010LL

Access flag fault, LL bits indicate level.

0b0011LL

Permission fault, LL bits indicate level.

0b010000

Synchronous external abort.

0b011000

Synchronous parity error on memory access.

0b010001

Asynchronous external abort.

0b011001

Asynchronous parity error on memory access.

0b0101LL

Synchronous external abort on translation table walk, LL bits indicate level.

0b0111LL

Synchronous parity error on memory access on translation table walk, LL bits indicate level.

0b100001

Alignment fault.

0b100010

Debug event.

All other values are reserved.


Table 4.127 shows how the LL bits in the Status field encode the lookup level associated with the MMU fault.

Table 4.127. Encodings of LL bits associated with the MMU fault

LL bitsMeaning
00Level 0 fault
01First level
10Second level
11Third level

To access the DFSR in AArch32 state, read or write the CP15 register with:

MRC p15, 0, <Rt>, c5, c0, 0; Read Data Fault Status Register
MCR p15, 0, <Rt>, c5, c0, 0; Write Data Fault Status Register
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